WOPR CPU

This specification is a work in progress. It is not complete and is being changed regularly. This draft notice will be removed and document given version once it is finalized.

WOPR is 16-bit stack based CPU. It has 65536 bytes of memory. All operations operate on 16 bit words on the evaluation stack. Pointers are 16 bit as well. 16 bit words are stored in little endian format.

Being stack based machine, this means that parameters are loaded onto the eval stack before being operated on. Only two instructions, PUSH and PUSHB, have parameters stored immediately after the instruction in code memory. All other instructions get their parameters from the eval stack and return results to it as well.

Registers

Instructions

Notation

Parameters:

When P0, P1, R0, etc. are on the right side of assignment, then the values are being removed from the stack. When the same are on left side of the assignment then they are added onto the stack.

NOP

No-operation, do nothing.

PUSH a P0 = a

Take literal word val, stored after the instruction in memory, and push it onto stack.

PUSHB a P0 = (byte)a

Take literal byte val, stored after the instruction in memory, and push it onto stack.

POP _ = P0

Simply drop the element from the stack.

LOAD P0 = [P0]

Take a word from memory pointed to by P0 and push it onto stack.

LOADB P0 = (byte)[P0]

Take a byte from memory pointed to by P0 and push it onto stack.

STO [P1] = P0

Take P0 and store it as a word in memory at location P1.

STOB [P1] = P0

Take P0 and store it as a byte in memory at location P1. Any overflow is lost.

LOAD_PC P0 = pc

Push PC onto stack.

LOAD_ES P0 = es

Push ES onto stack.

LOAD_RS P0 = rs

Push RS onto stack.

STO_ES es = P0

Pop a value from the stack and assign it to ES.

STO_RS rs = P0

Pop a value from the stack and assign it to RS.

ADD P0 = P1 + P0

Add.

SUB P0 = P1 - P0

Subtract.

NEG P0 = -P0

Signed negate.

MUL P0 = P1 * P0

Multiply.

MULS P0 = P1 * P0

Signed multiply.

DIV P0 = P1 / P0

Divide.

DIVS P0 = P1 / P0

Signed divide.

MOD P0 = P1 % P0

Modulo.

AND P0 = P1 & P0

Bitwise and.

OR P0 = P1 | P0

Bitwise or.

XOR P0 = P1 ^ P0

Bitwise exclusive or.

NOT P0 = ~P0

Bitwise not.

SHL P0 = P1 << P0

Shift left.

SHLS

Signed shift left.

SHR P0 = P1 >> P0

Shift right.

SHRS

Signed shift right.

JMP pc = P0

Relative jump.

CALL R0 = pc; pc = P0

Relative call.

RET pc = R0

Return from subroutine. Address to return to is popped from the Return Stack.

INT raise interrupt P0

Raise interrupt.

OUT

Send message P1 to device P0.

HALT

Halt the CPU. After halting the CPU has to be reset to continue operation. Reseting the CPU will erase the memory and otherwise reset it to factory settings.

Memory Map

Address Description
0x0000-0x0000
0xFFBF-0xFFFF Interrupt Table (0xFFBF - Int 0; 0xFFFE - Int 31)

Interrupts

Currently no interrupts are pre-assigned, and all can be used for hardware devices. However this will almost certainly change. Clock and Idle interrupts are just placeholders for now.

; software interrupts
1F
1E
1D
1C
1B
1A
19
18
17
16
15
14
13
12
11
10
; hardware interrupts
0F Idle?
0E
0D
0C
0B
0A Clock? Called every second.
09
08
07
06
05
04
03
02
01
00

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